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SmartSoC Solutions Pvt Ltd

Bangalore District / Global

Layout Design Engineer

Job Description

About the Company

SmartSOC Solutions is dedicated to delivering cutting-edge semiconductor solutions. Our mission is to innovate and excel in the field of advanced technology, fostering a culture of collaboration and excellence.


Qualifications

  • 4 to 12 years of relevant experience in Analog Layout Design.
  • Mandatory: Hands-on experience with FinFET technology or Samsung Foundry process technologies.
  • Strong experience in advanced technology nodes such as 2nm, 3nm, 5nm, or 7nm.
  • Experience in custom analog layout, DRC/LVS/ERC/PEX closure, and layout optimization.
  • Immediate joiners or candidates who can join within a short notice period are preferred.


Responsibilities:

  • Develop high-quality full-custom analog and mixed-signal layouts.
  • Perform floorplanning, device matching, routing, shielding, and optimization for analog circuits.
  • Execute layout verification including DRC, LVS, ERC, and PEX closure.
  • Ensure layout quality while meeting performance, power, area, and reliability requirements.
  • Collaborate with circuit designers to resolve layout-related issues and optimize design performance.
  • Work with advanced process technologies including FinFET nodes (2nm, 3nm, 5nm, and 7nm).
  • Perform parasitic-aware layout optimization and support post-layout verification.
  • Ensure compliance with foundry design rules and best layout practices.
  • Participate in design reviews and contribute to silicon bring-up support when required.



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