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ACL Digital
bangalore
Work Location: Bangalore Skills : 4+ years of experience in STA. Well-versed with the timing closure (STA), timing closure methodologies. Pre/Post-layout constraint development to timing closure. Handshake with the design team and develop functional/DFT constraints. IP level constraint integration. Multi-voltage/Switching aware corner definitions.
Job Source: ACL DigitalUST GLOBAL TECHNOLOGY SERVICES (INDIA) PRIVATE LIMITED
Bengaluru, Karnataka, India
Job Description for Standard Cell Characterization Engineer Relevant working experience of 3-8 years in Standard Cell Characterization and EDA development domain. Know-how of the ASIC design flow. Good Problem Solving and Analytical skills Strong communication skills (English) verbal and written Good to have: Working knowledge in MS Excel, PowerBI
Job Source: UST GLOBAL TECHNOLOGY SERVICES (INDIA) PRIVATE LIMITEDL&T Technology Services
Bengaluru, Karnataka, India
JD For STA Engineer-5+ years’ experience • Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. • Can work closely with FE team for constraints development and constraints cleanup. • Work with partitions/block owner to give timing ECO for timing closure. • Knowledge of advanced timing closure
Job Source: L&T Technology ServicesTech Mahindra
Bengaluru
Hi Folks Greetings from Tech Mahindra!! Role: STA Exp: 4 -8 Location: Bangalore/ Kochi/ Ahemdabad / Vizag About Job - Deep understating and experience of STA tool Tempus/PrimeTime /Tweaker/ DMSA(PTECO) . - Knowledge of timing corners/modes, process variations and signal integrity related issues are required. - Experience in timing closure of
Job Source: Tech MahindraL&T Technology Services
Bengaluru, Karnataka, India
STA Engineer with 5+ years’ experience Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. Can work closely with FE team for constraints development and constraints cleanup. Work with partitions/block owner to give timing ECO for timing closure. Knowledge of advanced timing closure technique
Job Source: L&T Technology ServicesL&T Technology Services
bangalore
JD For STA Engineer-5+ years’ experience • Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. • Can work closely with FE team for constraints development and constraints cleanup. • Work with partitions/block owner to give timing ECO for timing closure. • Knowledge of advanced timing closure
Job Source: L&T Technology ServicesTech Mahindra
bangalore
Hi Folks Greetings from Tech Mahindra!! Role: STA Exp: 4 -8 Location: Bangalore/ Kochi/ Ahemdabad / Vizag About Job Deep understating and experience of STA tool Tempus/PrimeTime /Tweaker/ DMSA(PTECO) . Knowledge of timing corners/modes, process variations and signal integrity related issues are required. Experience in timing closure of high frequ
Job Source: Tech MahindraAiml Services Pvt Ltd
Bengaluru
STA Engineers: Location: Bangalore/Hyderabad/Pune/Noida Responsibilities - ·Ability to work with RTL design team to identify the must changes in RTL to coverage the timing and work with PD teams to analyze the post route timing & support the final timing closure. - Drive the sign-off timing convergence for high performance designs. - Work closel
Job Source: Aiml Services Pvt LtdBengaluru, Karnataka, India
Hands on experience with layouts of important memory building blocks like control, sense amplifiers, I/O Blocks, bit cell array and decoders etc in compiler context.
Should have worked on 16nm / 14nm / 10nm/ 7nm/ Finfet process technologies .
Hands on experience with top level memory integration and DRC, LVS, Density verification and cleaning physicals across the compiler space.
Good handle on IR/EM related issues in memory layouts.
Must have worked on cadence tools for layout design and Cadence/Mentor/Synopsys tools for physical verification checks.
Strong knowledge of ultra-deep sub-micron layout design related challenges and good understanding of DFM guidelines.
Experience & or strong interest in memory compilers developed.
Excellent and demonstrated team player with ability to work with external customers and in cross functional teams
Requirement Name: : Memory Layout
Experience : 2+yrs
Location: Bangalore
Engineer jobs in Bengaluru, Karnataka, India
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