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Aiml Services Pvt Ltd
bangalore
STA Engineers: Location: Bangalore/Hyderabad/Pune/Noida Responsibilities ·Ability to work with RTL design team to identify the must changes in RTL to coverage the timing and work with PD teams to analyze the post route timing & support the final timing closure. Drive the sign-off timing convergence for high performance designs. Work closely with
Job Source: Aiml Services Pvt LtdL&T Technology Services
bangalore
STA Engineer with 5+ years’ experience Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs. Can work closely with FE team for constraints development and constraints cleanup. Work with partitions/block owner to give timing ECO for timing closure. Knowledge of advanced timing closure technique
Job Source: L&T Technology ServicesKPIT
bangalore
MATLAB: Job Description: Good Implementation & Unit Testing skills (MIL/SIL) on Matlab/Simulink /Statetflow platform Good knowledge on TPT Good debugging skills to find defects Hands on knowledge on Targetlink Should know how to create test cases, test specs Good knowledge on various testing methods C Programming concepts Experience in BCM domain
Job Source: KPITUST
bangalore
Key Responsibilities: Design, build, and maintain efficient, reusable, and reliable C++ code Implement performance and quality modules Identify bottlenecks and bugs, and devise solutions to these problems Help maintain code quality, organization, and automatization Implementation of automated testing platforms and unit tests Skillset Required Scrip
Job Source: USTHCLSoftware
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C Engineer As a professional Software Engineer you should have at least 5 years of work experience in a similar field, ideally DBMS development, and with a passion to learn and grow. The work location is our Center of Excellence in Bangalore, or Pune. KEY RESPONSIBILITIES · Design, implementation and supervision of enhancements improving performa
Job Source: HCLSoftwareSenSight Technologies Private Limited
Bengaluru, Karnataka, India
We are on the lookout for enthusiastic and talented AI Engineers with a focus on Large Language Models (LLMs) to join our forward-thinking team. The ideal candidate will possess a foundational understanding of machine learning, natural language processing (NLP), and software development principles, coupled with a keen interest in the cutting-edge f
Job Source: SenSight Technologies Private LimitedChubb
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The Purpose of the role As a key member of the Advanced Analytics and Digital team, he/she will be at the foreftont of developing new innovative data driven solutions with bleeding edge machine learning algorithms. AI Data Scientist is a technical job that uses machine learning techniques to automate underwriting processes. This person will be work
Job Source: ChubbKPIT
Bengaluru, Karnataka, India
HIL Validation : Good work experience and Knowledge in Automotive Systems Domain. Experience in Setting up of HIL system for system validation (Familiar with HIL system functionality, hardware/software tool set, Hardware IO requirements, Sensor and actuator signal interfaces in Powertrain Controls). Good know-how of testing methodologies and test
Job Source: KPITBengaluru, Karnataka, India
STA Engineers:
Location: Bangalore/Hyderabad/Pune/Noida
Responsibilities
·Ability to work with RTL design team to identify the must changes in RTL to coverage the timing and work with PD teams to analyze the post route timing & support the final timing closure.
Drive the sign-off timing convergence for high performance designs.
Work closely with block owners throughout the project for sign-off timing convergence.
· Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus
Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.
Evaluate multiple timing methodologies/tools on different designs and technology nodes.
Minimum Qualifications:
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
Preferred Qualification/Skills
Experience in timing analysis/debug and driving the timing convergence for complex blocks & release the netlists to PD team
Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling
Hands-on experience with STA tools - Prime-time/ Tempus
Have experience in driving timing convergence at Chip-level and Hard-Macro level
In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling,
· Hands on experience on constraint development for synthesis from scratch is a plus
Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus)
Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation is a plus
Proficient is scripting languages – TCL, Perl, Awk
STA engineers jobs in Bengaluru, Karnataka, India
ⓘ There was an unexpected error processing your request.
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