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Cadence Design Systems
Pune, Maharashtra, India
Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure. · The candidate will have the opportunity to work on many varieties of
Job Source: Cadence Design SystemsCadence Design Systems
Pune
Position Description: Exp: 7-12 Yrs · Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure. · The candidate will have the opportunity to work on many varieties
Job Source: Cadence Design SystemsTata Technologies
pune
Designation -Design/Sr. Design Engineer (Vehicle Integration) Position Type - FTE Qualification: - BE/ B Tech /M Tech [Mechanical Engineering] Primary Skillset: Vehicle Integration (PTC Creo) Relevant Experience: 1 - 5 Years Work Location - Pune Domain - Commercial Vehicle, DMU, 2D/3D Modeling, Layout Designing "Immediate Joiners Preferred" JOB D
Job Source: Tata TechnologiesTata Technologies
Pune, Maharashtra, India
Designation -Design/Sr. Design Engineer (Vehicle Integration) Position Type - FTE Qualification: - BE/ B Tech /M Tech [Mechanical Engineering] Primary Skillset: Vehicle Integration (PTC Creo) Relevant Experience: 1 - 5 Years Work Location - Pune Domain - Commercial Vehicle, DMU, 2D/3D Modeling, Layout Designing "Immediate Joiners Preferred" JOB D
Job Source: Tata TechnologiesCyient
Pune, Maharashtra, India
Designation : Design Quality Engineer Location : Pune Exp : 7+ Np : Imm - 60days JD: Be a part of sustaining project team and work in the design quality engineering across the entire product cycle. Ensure appropriate Project/Sustaining Quality Deliverables are created and properly executed (e.g. Project Design & Development Plan, Risk Management Pl
Job Source: CyientWenger & Watson Inc
pune
Responsibilities Exposure in design of Frame Working of integration and packaging of chassis components. Must have worked on different chassis aggregates ( long member, cross member etc). Exposure to manufacturing process for fabrication / sheet metal parts & surface coating. Working knowledge of GD & T and tolerance analysis Working of casting and
Job Source: Wenger & Watson IncCyient
pune
Designation : Design Quality Engineer Location : Pune Exp : 7+ Np : Imm - 60days JD: Be a part of sustaining project team and work in the design quality engineering across the entire product cycle. Ensure appropriate Project/Sustaining Quality Deliverables are created and properly executed (e.g. Project Design & Development Plan, Risk Management Pl
Job Source: CyientStymer Technologies Private Limited
pune
Exciting Opportunity Alert! Join Our Team at Stymer Technologies Pvt. Ltd. Are you a passionate and technically skilled individual seeking international exposure in Mechanical Engineering Design? Look no further! We are urgently hiring for the position of Design Engineer in our Mechanical Engineering Design department, which offers the chance to
Job Source: Stymer Technologies Private Limitedpune
Position Description:
Exp: 7-12 Yrs
· Perform physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure.
· The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed design. The responsibility includes participating in or leading next generation PHY IP physical design, methodology and flow development.
· Working closely with RTL design team & Analog Team to ensure successful tapeouts.
· Responsibility includes participating in or leading next-generation physical design, methodology, and flow development in advanced technology nodes
Position Requirements:
· B.Tech/BE/ME/Mtech with hands-on experience in physical design and verification.
· Experienced with ASIC design flow, hierarchical physical design strategies, and methodologies and understanding deep sub-micron technology issues.
· Solid knowledge of LP Design, DFT, static timing analysis, EM/IR-Drop/crosstalk analysis, formal verification, physical verification, and DFM.
· Successful track records of taping out complex IPs & SoCs at 16/10/7/5 nm Power user of Cadence implementation tools, such as Genus, Innovus, Quantus, Tempus, PVS, Voltus.
· Automation and programming-minded, coding experience in Makefile/Tcl/Tk/Perl.
Principal Design Engineer(Physical Design) jobs in pune
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